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Aldec Launches HES-DVM Proto ‘Cloud Edition’ – Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping

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HENDERSON, Nev.–(BUSINESS WIRE)–Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has launched HES-DVM Proto Cloud Edition (CE). Available through Amazon Web Services (AWS), HES-DVM Proto CE can be used for FPGA-based prototyping of SoC / ASIC designs and has a focus on automated design partitioning to greatly reduce bring-up time when up to four FPGAs are needed to accommodate a design. HES-DVM Proto CE can be used with Alde